Modulname | Bezeichnung | System options | QBUS Unibus | Bild |
---|---|---|---|---|
M8003 | PCL11-B TDM differential bus transceiver, UNIBUS | PCL11-B | U | |
M8005 | Q-BUS 16-bit relay output (-PO for S-box handles) | IDV11 | Q | |
M8006-PA | Q-BUS 72-bit opto-isolated output module | 11/23 | Q | |
M8007-PA | Q-BUS 72-bit opto-isolated input module | 11/23 | Q | |
M8010 | Q-BUS Papertape reader-punch | PCV11 | Q | |
M8012 | Q-BUS Bus terminator, bootstrap and diagnostic ROMs | BDV11 | Q | |
M8012-YA | Q-BUS Bus terminator (120 ohm), bootstrap and diagnostic ROMs, 18-bit only (MSQ12) | BDV11 | Q | |
M8013 | Q-BUS, RL01 disk controller, 1 of 2, 18-bit DMA only | RLV11 | Q | |
M8014 | Q-BUS, RL01 bus controller, 2 of 2, 18-bit DMA only, RLV11 | RLV11 | Q | |
M8015 | Q-bus CSC11-RA interface | CSC11 | Q | |
M8016 | Q-bus Power fail, realtime clock, no termination | KPV11-A | Q | |
M8016-YB | Q-bus M8016 with 120-ohm termination (18-bit only) | KPV11-A | Q | |
M8016-YC | Q-bus M8016 with 250-ohm termination (18-bit only) | KPV11-B | Q | |
M8017-AA | DLV11-E & DLV11-EC ETCH REV D , Single-line async control module, Q-bus | DLV11- E/EC | Q | |
M8017-PA | Single-line async control module with S-box handle,Q-bus | DLV11- E/EC | Q | |
M8018 | Writable control store module, for use with KD11-F (LSI-11/03) only, Q-bus | KUV11- AA | Q | |
M8020 | Single-line serial EIA sync interface, 1 LINE P, Q-BUS | DPV11-M | Q | |
M8020-PA | Q-BUS Single-line serial sync interface, (for BA200 series enclosures), Q-BUS | DPV11-S | Q | |
M8021 | Q-BUS 256-word RAM, space for 4-Kword UV PROM 16-bit addressing only | MRV11-BA | Q | |
M8022 | Q-BUS DRQ11-A + Alt. buffering | DRQ11-B | Q | |
M8024 | Q-BUS CEV11-A Q-bus interface | CEV11-A | Q | |
M8025 | Q-BUS CE11, CEV11-A control | CE11, CEV11 | Q | |
M8026 | Q-BUS DMA controller | NCV11-A | Q | |
M8027 | Q-BUS UNIVERSAL PRINTER INTERY (centronics) | LPV11 | Q | |
M8027-P | Q-BUS Printer Interface Module (centronics), (for BA200 series enclosures) | LPV11-S | Q | |
M8028 | DLV11-F ASYNC INTERFACE, EIA/20mA, error flags, break bit | DLV11-F | Q | |
M8029 | RXV21, Q-BUS to RX02 INTERFACE (Floppy-Control), 18-bit DMA only. | RXV21 | Q | |
M8034-YC | 48 channel output module, TTL output, UNIBUS | DRL11-A | Q | |
M8034-YD | 48 channel open collector TTL output, UNIBUS | DRL11-B | Q | |
M8035-YC | 48 channel optocoupled input, 24VDC in, UNIBUS | DSL11-A | Q | |
M8035-YD | 48 channel optocoupled input, 24VDC in, UNIBUS | DSL11-B | Q | |
M8036 | Q-bus control for NCV11-A | NCV11-A | Q | |
M8040 | Q-bus 16-bit parallel line unit | DRV11-C | Q | |
M8041 | Q-bus control for VT30-H | VT30-H | Q | |
M8043 | DLV11-J, 4-LINE serielle. PERIPH INTER., 4-Line Asynchronous Interface (formerly DLV11-J), (CS Rev. E or earlier incompatible with KDF11-A and KDF11-B) | DLV11 DLV11-M DLV11-J |
Q | |
M8044-AA | 4-Kword 16-bit MOS RAM (Also M8044-AB, -AC, -AD), Q-BUS | MSV11-DA | Q | |
M8044-BA | 8-Kword 16-bit MOS RAM (Also M8044-BB, -BC, -BD), Q-BUS | MSV11-DB | Q | |
M8044-CA | 16-Kword 16-bit MOS RAM (Also M8044-CB, -CC, -CD, -CE, -CF, -CH, -CL, -CM) | MSV11-DC | Q | |
M8044-DA | 32-Kword 16-bit MOS RAM, (Also M8044-DB, -DC, -DD, -DE, -DF, -DH, -DL, -DL, -DM), Q-BUS | MSV11-DD | Q | |
M8044-EA | 24K 16BIT MOS RAM, 16K CHIPS for PDP 11/23, Q-BUS | MSV11 | Q | |
M8044-EB | 24K 16BIT MOS RAM, 16K CHIPS for PDP 11/23, Q-BUS | MSV11 | Q | |
M8044-DK | 32K 16BIT MOS RAM, 16K CHIPS, Memory for PDP 11/23, QBUS | MSV11-DD | Q | |
M8044-DF | 32K 18BIT MOS RAM, Q-BUS | MSV11 | Q | |
M8045-AB | 4-Kword 18-bit MOS RAM, Q-BUS | MSV11-EA | Q | |
M8045-BA | 8-Kword 18-bit MOS RAM, QBUS | MSV11-EB | Q | |
M8045-CH | 16-Kword 18-bit MOS RAM (Also M8045-CJ, -CK, -CL), QBUS | MSV11-EC | Q | |
M8045-DA | 32-Kword 18-bit MOS RAM (Also M8045-DB, -DC, -DD, -DH, -DJ, -DK, -DL), QBUS | MSV11-EC | Q | |
M8045-DE | 32-Kword 18-bit MOS RAM (Also M8045-DB, -DC, -DD, -DH, -DJ, -DK, -DL), QBUS | MSV11-ED | Q | |
M8046 | DLV11 with differential drive like M5946, QBUS | DLV11-L | Q | |
M8047-AA | 4-Kword RAM, 2 async EIA SLU, sockets for 2 24-pin 5V ROMs (Also M8047-AB, -AC, -AD, -AE) (18-bit addressing only on memory), QBUS | MXV11-AA | Q | |
M8047-CA | 16-Kword RAM, 2 async EIA SLU, sockets for 2 24-pin 5V ROMs, (Also M8047-CB, -CC, -CD, -CE, -CF, -CH, -CM), QBUS | MXV11-AC | Q | |
M8047-HA | 16-Kword RAM, 2 async EIA SLU (8 bits + parity), sockets for 2 24-pin 5V ROMs, 1-K I/O address,jumper to 2-K (Also M8047-HB, -HC, -HD, -HE, -HF), QBUS | MXV11-HA | Q | |
M8048 | Universal PROM/ROM module with sockets for 16 24-pin ROMs, up to 32-Kword (18-bit addressing only), QBUS | MRV11-C | Q | |
M8049 | Hi-density parallel line unit (4 lines x 16 bits), QBUS | DRV11-J | Q | |
M8049-AA | Modification of DRV11-J to DRV1J-SA/-SF, QBUS | DRV1J- SA/SF | Q | |
M8049-PA | M8049 for BA200 series, QBUS | DRV1J-S | Q | |
M8053 | Microprogrammed controller V.35, RS232/423, with space for ROM, QBUS | DMV11 | Q | |
M8053-AA | Microprogrammed controller (needs one of M5930-M5931) (Also M8053-AB, -AC, -ETC), QBUS | DMV11 | Q | |
M8053-MA | M8053 with DDCMP control ROM (point-to-point or multidrop), QUAD | DMV11 | Q | |
M8053-PA | M8053 WITH S-BOX HANDLE, QBUS | DMV11 | Q | |
M8059-AF | 128Kb Memory, QBUS | MSV11 | Q | |
M8059-FA | 64-Kword MOS RAM, single voltage (Also M8059-FC, -FF, -FH, -FJ, -FP, -FV), QBUS | MSV11-LF | Q | |
M8059-KC | 128-Kword MOS RAM, single voltage (Also M8059, -KF, -KH, -KJ, -KP, -KV), QBUS | MSV11-LK | Q | |
M8059-KA | 128-Kword MOS RAM, single voltage (Also M8059-KC, -KF, -KH, -KJ, -KP, -KV), QBUS | MSV11-LF | Q | |
M8061 | RL01/02 DISK CONTROL, QBUS | RLV12 | Q | |
M8063-AA | FALCON (SBC-11/21) single-board CPU with 2 SLU, 1 parallel line unit, line frequency clock, 16-Kbyte RAM (T11 processor), Q-BUS | KXT11-AA | Q | |
M8063-BA | DC310 CPU chip 2 x serial 1 x parall, QBUS | KXT11-AB | Q | |
M8064 | Microprogrammed controller, integral modem, space for ROM (single-line sync) | DMV11 | Q | |
M8064-MA | M8064 W DDCMP point-to-point or multidrop, integral modem interface, QBUS | DMV11 | Q | |
M8067-FA | 128-Kbyte MOS memory with parity CSR QBUS | MSV11-PF | Q | |
M8067-KA | MSV11-PK:256KB MOS memory with parity CSR, for PDP11/23 | MSV11-PK | Q | |
M8067-KF | 256KB for LSI 11, MOS Memory 128KW, 18Bit | MSV11 | Q | |
M8067-KH | 256Kb MOS for LSI 11, MOS Memory 128KW, 18Bit | MSV11-PK | Q | |
M8067-LA | MSV11-PL:512KB memory with parity CSR, QBUS | MSV11-PL | Q | |
M8067-LB | MSV11:512KB MOS memory, QBUS | MSV11 | Q | |
M8080 | DECdataway QBus Interface, QBUS | ISV11-B | Q | |
M8081 | Image processing frame buffer prototype, QBUS | RLV12 | Q | |
M8084 | DECdataway Line Interface (Modem), QBUS | ISV11-B | Q | |
M8085 | DECDataway serial line interface, QBUS | ISV11-B | Q | |
M8086-YA | LPV11-SA, 2/CHAN. LPV11 printer control for S-box .W/2 | LPV11 | Q | |
M8087 | LNV21, Q-BUS to Printer Interface , QBUS | LNV21 | Q | |
M8087-PA | LNV21-PA, Scanner/printer to Q-bus DMA interface, QBUS | LNV21 | Q | |
M8088-AA | ND50 memory controller for demand printing solution, QBUS | ND50 | Q | |
M8089-AA | ND50 adapter ADLC to Q-bus data translation, QBUS | ND50 | Q | |
M8090 | MASTER CONT FOR ICS11 , UNIBUS | ICS11 | U | |
M8094 | ICR11 remote master control, UNIBUS | ICR11 | U | |
M8096 | ICR11 remote slave control, UNIBUS | ICR11 | U | |
M8098 | ICR11 remote modem control, 1 Megabaud, UNIBUS | ICR11 | U | |
M8100 | Data paths (DAP) ( PDP11/45), UNIBUS | KB11 | U | |
M8101 | General Regs & ALU CNTL (GRA) ( PDP11/45), UNIBUS | KB11 | U | |
M8102 | IR Decode & Cond. Codes (IRC) ( PDP11/45), UNIBUS | KB11 | U | |
M8103 | ROM & ROM Control (RAC) ( PDP11/45), UNIBUS | KB11 | U | |
M8104 | Proc Data & UNIBUS Reg. (PDR) ( PDP11/45), UNIBUS | KB11 | U | |
M8105 | TRAB & Misc. Cntl. (TMC) ( PDP11/45), UNIBUS | KB11 | U | |
M8106 | Proc Data & UNIBUS Reg. (PDR) ( PDP11/45), UNIBUS | KB11 | U | |
M8107 | System Address Paths (SAP) for KT11-C (PDP11/45), UNIBUS | KT11-C | U | |
M8108 | System Status Register (SSR) for KT11-C ( PDP11/45), UNIBUS | KT11-C | U | |
M8109 | TIMING GENERATOR (TIG) ( PDP11/45), UNIBUS | KT11 | U | |
M8110 | SMC Module ( PDP11/45), UNIBUS | 11/45 | U | |
M8111 | Bipolar Memory Matrix schematic, 1-Kword 16-bit bipolar memory, UNIBUS | 11/45 | U | |
M8111-YA | Bipolar Memory Matrix schematic with parity, 1-Kword 18-bit bipolar memory, UNIBUS | 11/45 | U | |
M8112 | FP ROM Control (FRM) for PDP11/45, UNIBUS | FP11 | U | |
M8113 | FP exponent data path (FKP) for PDP11/45, UNIBUS | FP11 | U | |
M8114 | Fraction Data Path high order (FRH) for PDP11/45, UNIBUS | FP11 | U | |
M8115 | Fraction Data Path low order (FRL) for PDP11/45, UNIBUS | FP11 | U | |
M8116 | System jumper board. (SJB)( PDP11/45), UNIBUS | KB11 | U | |
M8119 | 11/45 UNIBUS control for FP11-C compatibility, (Replaces M8106), UNIBUS | KB11 | U | |
M8120 | 11/45 memory control for bipolar memory, UNIBUS | U | ||
M8121-YA | 4-Kword 18-bit bipolar memory, UNIBUS | MS11-AP | U | |
M8123 | 11/70 ROM & address control, FP11-C compatible, UNIBUS | KB11-C | U | |
M8124 | 11/74 M8150 with expanded silo, UNIBUS | RH70-C | U | |
M8125 | 11/74 M8153-YA new layout, ROM & address control, FP11-C compatible, UNIBUS | RH70-C | U | |
M8126 | FRACTION PROCESSOR HIGH ORDER, UNIBUS | FP11-C | U | |
M8127 | FRACTION PROCESSOR LOW ORDER , UNIBUS | FP11-C | U | |
M8128 | FRACTION PROCESSOR ROM CONTROL, UNIBUS | FP11-C | U | |
M8129 | 11/70 fraction processor, exponent path, UNIBUS | FP11-C | U | |
M8130 | 11/70 data paths module, UNIBUS | KB11-C | U | |
M8131 | 11/70 general registers and ALU control, UNIBUS | KB11-C | U | |
M8132 | 11/70 instruction register decode & condition codes, MODIFIED M8102, UNIBUS | KB11-C | U | |
M8132_YA | 11/70 instruction register decode & condition codes, modified to indicate full decode of ASRB, UNIBUS | KB11-C | U | |
M8133 | 11/70 ROM & ROM control module | KB11-C | U | |
M8134 | 11/70 processor data & UNIBUS registers module | KB11-C | U | |
M8135 | 11/70 trap and miscellaneous control module | KB11-C | U | |
M8136 | 11/70 UNIBUS and console control module | KB11-C | U | |
M8137 | 11/70 system address path module | KB11-C | U | |
M8138 | 11/70 segmentation status register used with FP11-B | KB11-C | U | |
M8138-YA | 11/70 segmentation status register used with FP11-C | KB11-C | U | |
M8139 | 11/70 timing generator module | KB11-C | U | |
M8140 | 11/70 segmentation and console control module | KB11-C | U | |
M8141 | 11/70 mapping box | KB11-C | U | |
M8142 | 11/70 cache control board | KB11-C | U | |
M8143 | 11/70 cache address memory board, UNIBUS | KB11-C | U | |
M8144 | 11/70 cache data memory, UNIBUS | KB11-C | U | |
M8145 | 11/70 cache data path, CACHE ADM | KB11-C | U | |
M8147 | 11/70 memory control and timing module (Replaces M8148) | MJ11-A/B | U | |
M8148 | 11/70 memory control and timing module (Replaced by M8147) | MJ11-A | U | |
M8149 | 11/70 memory control and timing module (Replaces M8148) | MJ11 | U | |
M8150 | 11/70 RH70 MASSBUS DATA PATH module | RH70 | U | |
M8151 | 11/70 RH70 MASSBUS CONTROL + STATUS module | RH70 | U | |
M8152 | 11/70 RH70 MASSBUS ADDRESS + WORD COUNT registers, UNIBUS | RH70 | U | |
M8153 | RH70 UNIBUS CONTROL (M8150-M8153 is option RH55 in an 11/55) | RH70 | U | |
M8153-YA | 11/70 M8153 with independent NED timeout for RH70-B (see M8125) | RH70 | U | |
M8154 | 11/70 MES, massbus controller | RH70 | U | |
M8156 | Data path module | RH70-A | U | |
M8157 | DMA control module | RH70-A | U | |
M8158 | Address buffer module | MK11 | U | |
M8159 | DMA control module | MK11 | U | |
M8160 | Control A module | MK11 | U | |
M8161 | Control B module | MK11 | U | |
M8162 | Port MUX A module | MK11 | U | |
M8163 | Port MUX B module | MK11 | U | |
M8164 | Data buffer module (Replaces M8159) | MK11/ MKA11 | U | |
M8165-YA | 11/74 CCR, CISP control ROM logic card #1, UNIBUS | KE74-A | U | |
M8165-YB | 11/74 CCR, CISP control ROM logic card #2, UNIBUS | KE74-A | U | |
M8166 | 11/74 CCS, CISP control store, UNIBUS | KE74-A | U | |
M8167 | 11/74 CDI, CISP decimal integral, UNIBUS | KE74-A | U | |
M8168 | 11/74 DSC, CISP descriptor unit, UNIBUS | KE74-A | U | |
M8169 | 11/74 maintenance display and control, UNIBUS | U | ||
M8177 | 11/74 system address path, UNIBUS | KB11-CM | U | |
M8181 | 11/74 mapping box, UNIBUS | KB11-EM | U | |
M8182 | 11/74 cache control board, UNIBUS | KB11-CM | U | |
M8183 | 11/74 cache address memory board, UNIBUS | KB11-CM | U | |
M8184 | 11/74 cache data memory, UNIBUS | KB11-EM | U | |
M8185 | 11/74 cache data path, UNIBUS | KB11-EM | U | |
M8185-YC | 11/74 11/23 CPU without options, Q-BUS | KDF11-AC | Q | |
M8186 | 11/23 CPU (Prior to etch rev. C, 18-bit addressing only. Caution, uses BC1, BD1, BE1, BF1 for purposes other than BDAL18-21) | KDF11-A | Q | |
M8186-YA | 11/23 CPU with KTF11-AA (MMU) and sockets for KDF11-AA, DUAL HEIGHT CPU,Q-BUS | KDF11-AA | Q | |
M8186-YB | 11/23 CPU with KTF11-AA (MMU) and KEF11-AA (FP11), DUAL HEIGHT CPU,Q-BUS | KDF11-AB | Q | |
M8186-YC | 11/23 CPU without options, KDF11-AC DUAL HEIGHT CPU,Q-BUS | KDF11-AC | Q | |
M8188 | FPF11 FLOATING POINT PROCESSOR for PDP-11/23[+], (11/24?) | FPF11 | Q | |
M8189 | 11/23-PLUS single-board CPU, quad, KDF11-BA, PDP11/23 CPU | 11/23+ | Q | |
M8189-BJ | KDF11-BJ, PDP11/23 CPU | 11/23+ | Q | |
M8190 | 11/84 CPU: J11 CPU 15MHz with unusable socket for FPJ11 and 2 SLUs, boot & diagnostic ROMs, 3 ROM sockets, 8-Kbyte cache., QBUS | KDJ11-B | Q | |
M8190-AB | J11 CPU 15MHz with 2 boot & diagnostic ROMs, FPJ11 compatibility (warm floating point, but will accept FPA), QBUS | KDJ11-BB | Q | |
M8190-AC | J11 CPU 15MHz with 2 boot & diagnostic ROMs, FPJ11-AA, QBUS | KDJ11-BD | Q | |
M8190-AD | J11 CPU 15MHz with 2 boot & diagnostic ROMs FPJ11 compatibility (warm floating point, but,will accept FPA), QBUS | KDJ11-BD | Q | |
M8190-AE | 11/83-84 CPU J11 CPU 18MHz with 2 boot & diagnostic ROMs, FPJ11-AA. QUAD CPU MOD, DCJ11-AA, QBUS | KDJ11-BA | Q | |
M8191 | UNIBUS ADAPT FOR KDJ11B W/MAP 11/84 PMI controller (contains 4 optional boot ROM sockets (M9312 compatible)). | KTJ11-B | U | |
M8192 | LSI-11/73 CPU, 8-Kbyte cache, not FPJ11-AA compatibile (but can be upgraded), Q-BUS | KTJ11-AA | Q | |
M8192-YB | LSI-11/73 CPU, 8-Kbyte cache, FPJ11-AA compatible. DUAL HEIGHT CPU BRD (KDJ11-A) | KTJ11-AB | Q | |
M8192-YC | LSI-11/73 CPU, 8-Kbyte cache, FPJ11-AA installed. DUAL HGT. CPU BRD | KTJ11-AC | Q | |
M8194 | Data memory module, Q-BUS | ICR11 | Q | |
M8195 | Cache data path module, Q-BUS | ICR11 | Q |